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Use the tabbed panel (right) to browse through Elonex's patents year by year. Click on each patent reference number to view a brief description. If available, you can also download the full PDF specification. To view PDF documents, you will need Adobe Acrobat Reader.
PATENT: NO. 5537343
DATE 28.12.1994
A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also has a means for storing a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port. In one embodiment, a personal digital assistant module and a computer having docking bays is provided also having movable heat sink structures for contacting and cooling docked modules.
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A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also has a means for storing a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port. In one embodiment, a personal digital assistant module and a computer having docking bays is provided also having movable heat sink structures for contacting and cooling docked modules.
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PATENT: NO. 5504877
DATE 29.14.1994
Timing is set for DRAM memory access in a computer by polling the DRAM memory banks, calculating capacitive load by accessing a prestored table of capacitive load versus DRAM size, and assigning wait states according to calculated capacitive load by accessing a prestored formula.
In one embodiment, wait states are assigned in increasing increments for increasing total capacitive load.
In an alternative embodiment, timing is assigned bank by bank. Control routines are preferably a part of a system BIOS.
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Timing is set for DRAM memory access in a computer by polling the DRAM memory banks, calculating capacitive load by accessing a prestored table of capacitive load versus DRAM size, and assigning wait states according to calculated capacitive load by accessing a prestored formula.
In one embodiment, wait states are assigned in increasing increments for increasing total capacitive load.
In an alternative embodiment, timing is assigned bank by bank. Control routines are preferably a part of a system BIOS.
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PATENT: NO. 5628031
DATE 07.11.1994
A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also stores a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port.
In yet another embodiment a low-profile construction technique is used wherein discrete elements are assembled wholly enclosed within openings in a rigid substrate having interconnects on a surface of the substrate.
A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also stores a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port.
In yet another embodiment a low-profile construction technique is used wherein discrete elements are assembled wholly enclosed within openings in a rigid substrate having interconnects on a surface of the substrate.
PATENT: NO. 5565897
DATE 16.09.1994
A system for adjusting signals to a CRT in a video monitor utilizes an interactive display having shapes that appear rectangular on a properly adjusted monitor and dragging handles associated with the shapes.
Control routines executed on a host computer associate pointer position and movement in dragging the handles with creation of signals to be sent to the monitor to correct signals to the CRT to produce a properly sized, positioned, and shaped display.
In one embodiment, digital values are placed in serial packets on a VSYNC line from the host to the video monitor, and a microcontroller in the monitor receives the digital values and drives circuitry in the monitor according to the received commands and data to adjust the signals to the CRT to correct the display.
A system for adjusting signals to a CRT in a video monitor utilizes an interactive display having shapes that appear rectangular on a properly adjusted monitor and dragging handles associated with the shapes.
Control routines executed on a host computer associate pointer position and movement in dragging the handles with creation of signals to be sent to the monitor to correct signals to the CRT to produce a properly sized, positioned, and shaped display.
In one embodiment, digital values are placed in serial packets on a VSYNC line from the host to the video monitor, and a microcontroller in the monitor receives the digital values and drives circuitry in the monitor according to the received commands and data to adjust the signals to the CRT to correct the display.
PATENT: NO. 5522089
DATE 12.09.1994
A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also stores a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking, a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port.
In yet another embodiment, an interface is provided via an interactive, menu-driven display and an on-board speaker to allow a user to select parties to be called, and to dial the parties, including credit card charge data, via DTMF tones generated by the on-board speaker.
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A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also stores a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking, a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port.
In yet another embodiment, an interface is provided via an interactive, menu-driven display and an on-board speaker to allow a user to select parties to be called, and to dial the parties, including credit card charge data, via DTMF tones generated by the on-board speaker.
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PATENT: NO. 5680126
DATE 23.08.1994
A modular computer has a framework with module bays for receiving CPU modules, power modules, and peripheral function modules such as floppy and hard disk drives.
The framework has a built-in compressed bus and a variety of function modules which can be plugged into any one of the module bays. Function modules include, but are not limited to, CPU, power, floppy disk, hard disk, RAM memory, LAN communication, modem, FAX communication, and data acquisition.
In some embodiments function modules are provided for communicating with separate input means, such as voice, keyboards, and pen-pads.
In one aspect the module bays and the function modules are configured according to dimensional and connective standards of the Personal Computer Memory Card International Association.
In another aspect a modular portable computer has a flexible, rollable, keyboard with a system for transmitting keystroke signals by magnetic induction.
A modular computer has a framework with module bays for receiving CPU modules, power modules, and peripheral function modules such as floppy and hard disk drives.
The framework has a built-in compressed bus and a variety of function modules which can be plugged into any one of the module bays. Function modules include, but are not limited to, CPU, power, floppy disk, hard disk, RAM memory, LAN communication, modem, FAX communication, and data acquisition.
In some embodiments function modules are provided for communicating with separate input means, such as voice, keyboards, and pen-pads.
In one aspect the module bays and the function modules are configured according to dimensional and connective standards of the Personal Computer Memory Card International Association.
In another aspect a modular portable computer has a flexible, rollable, keyboard with a system for transmitting keystroke signals by magnetic induction.
PATENT: NO. 5579489
DATE 26.07.1994
A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also stores a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port.
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A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also stores a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port.
Download PDF specification (2.1MB)
PATENT: NO. 5600800
DATE 19.07.1994
A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also stores a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port.
A personal digital assistant module with a local CPU, memory, and I/O interface has a host interface comprising a bus connected to the local CPU and a connector at a surface of the personal digital assistant for interfacing to a bus connector of a host general-purpose computer, providing direct bus communication between the personal digital assistant and the host general-purpose computer.
In an embodiment, the personal digital assistant also stores a security code. The personal digital assistant according to the invention forms a host/satellite combination with a host computer having a docking bay, wherein upon docking a docking protocol controls access by the host to memory of the personal digital assistant based on one or more passwords provided by a user to the host.
In another embodiment the personal digital assistant also has an expansion port connected to the local CPU, and expansion peripheral devices may be connected and operated through the expansion port.
PATENT: NO. 5528480
DATE 28.04.1994
A power supply for producing a regulated dc output from an ac primary input incorporates a convention rectifying and filtering circuitry feeding a switching circuit for providing a high frequency, substantially rectangular voltage waveform to a high frequency transformer.
The output of the transformer is provided to a synchronous buck converter having a grounded line and an ungrounded line, with a first FET switch in the ungrounded line and a second FET switch connected from the output of the first FET switch to the grounded line. A controller in the synchronous buck converter switches the FETs according to the input voltage waveform to achieve rectification.
In another aspect, two FETs are placed in opposite polarity in the ungrounded line and switched together, and the controller also alters the duty cycle of the switching in accordance with the magnitude of a regulated output produced from the output of the synchronous buck converter, to achieve precise regulation.
Power supplies are provided with multiple outputs of different regulated voltage, which may be externally enabled and disabled.
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A power supply for producing a regulated dc output from an ac primary input incorporates a convention rectifying and filtering circuitry feeding a switching circuit for providing a high frequency, substantially rectangular voltage waveform to a high frequency transformer.
The output of the transformer is provided to a synchronous buck converter having a grounded line and an ungrounded line, with a first FET switch in the ungrounded line and a second FET switch connected from the output of the first FET switch to the grounded line. A controller in the synchronous buck converter switches the FETs according to the input voltage waveform to achieve rectification.
In another aspect, two FETs are placed in opposite polarity in the ungrounded line and switched together, and the controller also alters the duty cycle of the switching in accordance with the magnitude of a regulated output produced from the output of the synchronous buck converter, to achieve precise regulation.
Power supplies are provided with multiple outputs of different regulated voltage, which may be externally enabled and disabled.
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PATENT: NO. 5502838
DATE 28.04.1994
A system for controlling temperature buildup in an IC employs a temperature sensor to provide an indication of the IC temperature to a control circuit which is configured to provide an operational clock rate to the IC which is less than the system clock rate, based on a function of the temperature of the IC or its package.
In one embodiment temperature sensors are implemented as solid-state circuitry within different functional areas of a single IC, such as a microprocessor.
In other embodiments, operating voltage is lowered as operating frequency is lowered.
In yet another embodiment temperature sensing of multiple processors in a system is provided to a controller or controllers which are configured to allocate workload between the processors as a means to limit temperature rise, as well as to lower operational clock rate and to lower operating voltage.
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A system for controlling temperature buildup in an IC employs a temperature sensor to provide an indication of the IC temperature to a control circuit which is configured to provide an operational clock rate to the IC which is less than the system clock rate, based on a function of the temperature of the IC or its package.
In one embodiment temperature sensors are implemented as solid-state circuitry within different functional areas of a single IC, such as a microprocessor.
In other embodiments, operating voltage is lowered as operating frequency is lowered.
In yet another embodiment temperature sensing of multiple processors in a system is provided to a controller or controllers which are configured to allocate workload between the processors as a means to limit temperature rise, as well as to lower operational clock rate and to lower operating voltage.
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PATENT: NO. 5416610
DATE 01.04.1994
A photovoltaic film provided with a computer allows the computer to be used as a scanner as well as a conventional computer.
In a preferred embodiment the photovoltaic film is transparent, and is applied directly to the display screen of the computer system. The film is connected to signal processing means connected to the internal bus structure of the computer.
A hard copy document is positioned adjacent the film, and control routines loaded to and run on the computer control pixel illumination on the computer screen in a scanning protocol. Illumination of pixels in conjunction with characteristics of the hard copy at the pixel position cause the signal generated by the photovoltaic film to alter in voltage. Signals from the film are processed and used to generate a bit pattern as the scanned image.
In an alternative embodiment the photovoltaic film is a part of a separate sheet applicable to a computer screen and connectable to an expansion card for connection to the computer, providing a system useful with existing computers.
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A photovoltaic film provided with a computer allows the computer to be used as a scanner as well as a conventional computer.
In a preferred embodiment the photovoltaic film is transparent, and is applied directly to the display screen of the computer system. The film is connected to signal processing means connected to the internal bus structure of the computer.
A hard copy document is positioned adjacent the film, and control routines loaded to and run on the computer control pixel illumination on the computer screen in a scanning protocol. Illumination of pixels in conjunction with characteristics of the hard copy at the pixel position cause the signal generated by the photovoltaic film to alter in voltage. Signals from the film are processed and used to generate a bit pattern as the scanned image.
In an alternative embodiment the photovoltaic film is a part of a separate sheet applicable to a computer screen and connectable to an expansion card for connection to the computer, providing a system useful with existing computers.
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PATENT: NO. 5515510
DATE 14.01.1994
An interconnection topography for microprocessor-based communication nodes consists of opposite arrays of client nodes and resource nodes, with each client node connected to one resource node by a data transfer link, each resource node connected to a resource trunk by a data transfer link, and each node connected to just four neighboring nodes by data transfer links.
Communication nodes in the topography are microprocessor controlled, and comprise random access memory and data routing circuitry interfaced to the data transfer links.
In one aspect resource nodes are provided with a map of the interconnection topography for use in routing data.
In another aspect, individual ones of the communication nodes are programmed as servers for receiving client requests and scheduling routing of resource data.
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An interconnection topography for microprocessor-based communication nodes consists of opposite arrays of client nodes and resource nodes, with each client node connected to one resource node by a data transfer link, each resource node connected to a resource trunk by a data transfer link, and each node connected to just four neighboring nodes by data transfer links.
Communication nodes in the topography are microprocessor controlled, and comprise random access memory and data routing circuitry interfaced to the data transfer links.
In one aspect resource nodes are provided with a map of the interconnection topography for use in routing data.
In another aspect, individual ones of the communication nodes are programmed as servers for receiving client requests and scheduling routing of resource data.
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PATENT: NO. 5390673
DATE 14.01.1994
A magnetic resonance imaging system has an elongate hand-held probe with a permanent magnet positioned within the probe to align the pole axis of the permanent magnet with the central axis of the probe. A burst/sense electromagnetic coil is positioned to provide a magnetic field coaxial with that of the permanent magnet. The burst/sense coil provides high frequency bursts to excite nuclei in a sample with the end of the probe held proximate a surface of the sample.
Bursts are alternated with sensing periods to sense echo from resonating nuclei in the sample. The sensed point in a sample volume can be moved by altering the burst frequency. In another aspect a bias field is provided by the burst/sense coil, and deflection coils are used to move the sensed point through a slice by deflecting the summed permanent and bias field.
Different slices are sensed by changing the bias field and repeating sensing an array of points in a new slice. The probe is integrated with a general-purpose computer to provide control, recording of sensed values, assembly of bit maps, and display of images.
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A magnetic resonance imaging system has an elongate hand-held probe with a permanent magnet positioned within the probe to align the pole axis of the permanent magnet with the central axis of the probe. A burst/sense electromagnetic coil is positioned to provide a magnetic field coaxial with that of the permanent magnet. The burst/sense coil provides high frequency bursts to excite nuclei in a sample with the end of the probe held proximate a surface of the sample.
Bursts are alternated with sensing periods to sense echo from resonating nuclei in the sample. The sensed point in a sample volume can be moved by altering the burst frequency. In another aspect a bias field is provided by the burst/sense coil, and deflection coils are used to move the sensed point through a slice by deflecting the summed permanent and bias field.
Different slices are sensed by changing the bias field and repeating sensing an array of points in a new slice. The probe is integrated with a general-purpose computer to provide control, recording of sensed values, assembly of bit maps, and display of images.
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